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AVL SET GmbH

AVL Inverter TS™

Beschreibung

The AVL Inverter TS­™ enables the independent testing of the inverter while optimizing the integration with all other components in the electrified powertrain. The test system is based on e-motor emulation technology with real-time simulation. This leads to highly accurate results when testing the inverter with required battery voltage and e-motor current.

For such a testing setup, exact copies of the e-motor and the battery are required. Within the Inverter TS, the e-motor is replaced very accurately with the Power Amplifier Cabinet (PAC) and the Signal Processing Cabinet (SPC). The UUT DC Supply Cabinet (USC) represents a digital copy of the battery. As a result, an efficient and flexible test equipment for the testing of inverters is available, which – in contrast to an active load cabinet – emulates with highest accuracy the real physics of an e-motor directly at the terminals.

THE ADDED VALUE

  • Reliable and reproducible test resultsglobally

As a technology leader in e-motor emulation, we have built up comprehensive application know-how. This enables the realistic mapping of inputs as outputs on the UUT via software and hardware which is the only way to ensure highest accuracy in the emulation. Thereby, our customers get real, valuable and reproducible test results

  • Flexible, accurate and fast mapping of all common motor concepts

The Inverter TS must fit for many different powertrain configurations. Thanks to the validated and implemented motor models of our inverter test system, this can be ensured quite simply with a mouse-click. The motor data serve as input, which are evaluated as parameters in the motor model. To start the inverter tests, only a few motor values are required. The better the database, the higher the emulation quality and the greater the added value of the virtual e-motor. Simple, easy to get started and accurate!

  • Emulating failure situations and inverter behavior testing

The Inverter TS and its integrated Failure Emulation Cabinet (FEC) enables the testing of critical failure situations. Potentially occurring errors and the inverter’s reaction can be emulated again and again to check the development progress. Failures such as cable breaks or short circuits at the motor phases, and many more, can be emulated. The Inverter TS offers a simple, safe and fast way to safeguard and test these situations.

TECHNICAL DATA

  • UUT* DC-link Voltage in V: 100 … 1,000
  • Number of phases: 3, 2x3, 6
  • Phase current, 3 ph in ARMS: up to 2,400 + overload
  • Phase current, 2x3 ph / 6 ph in ARMS: up to 1,200 + overload
  • System power in kW: up to 960 + overload
  • Emulated motor types: PMSM, IM, EESM
  • Additional control features: Current control, Voltage control, Temperature dependency, Harmonics
  • Channels / number of UUT: Single-channel (1 UUT), Multi-Channel (2 UUT)
  • Emulation via high performance electronics: 320 ns model
  • Failure insertion on power level: active shorts, phase shorts, phase breaks, DC breaks, potential
  • Specific built-in tools: inverter protection, signal scope, parameter wizard, dedicated safety system

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